35 lines
1.6 KiB
Markdown
35 lines
1.6 KiB
Markdown
# autosearch — Research notes for Intel + Z80 custom-chip emulation
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This is the scratchpad for everything we *learn* while building these
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chips. It mirrors the convention used in `test/autosearch/` (numbered
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markdown files, oldest first).
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## Index
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- [01_velxio_chip_capabilities.md](01_velxio_chip_capabilities.md) —
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What the velxio custom-chip SDK and runtime actually offer today
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(pins, memory, timers, I²C/SPI/UART). Sourced by reading
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`backend/sdk/velxio-chip.h` and
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`frontend/src/simulation/customChips/ChipRuntime.ts`.
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- [02_intel_chips_overview.md](02_intel_chips_overview.md) —
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Per-chip facts: package, pin count, bus widths, clock, instruction
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set scale, register file size. Public-domain hardware facts (ISA
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references, Intel datasheets are widely mirrored).
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- [03_emulation_strategy.md](03_emulation_strategy.md) —
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How an instruction-level emulator maps onto the velxio reactive
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callback model. Timer-driven `step()`, pin multiplexing, bus mastering.
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- [04_open_source_emulator_references.md](04_open_source_emulator_references.md) —
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Candidate header-only or tiny C emulators we could port (subject to
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license review before vendoring).
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- [05_open_questions.md](05_open_questions.md) —
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Things we don't know yet and need to confirm before writing code.
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## Conventions
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- Cite the source for any specific number (datasheet section, repo path,
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or "common knowledge — verify").
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- If a fact is uncertain, write it under "Open questions" instead of
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the spec docs.
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- License-sensitive code (an emulator we vendor) goes in the per-chip
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folder, **not** here. This folder is research only.
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