velxio/backend/app/services
davidmonterocrespo24 de43ef47e4 fix(pi3): pipe chardev for proto channel + Phase 2 protocol mux
QEMU 10's virtserialport on a socket chardev (server=on,wait=off)
silently drops guest→host bytes. Reproduced cleanly: writes from
inside the guest to /dev/vport<N>p<M> succeed (no errno) but the
connected client socket receives 0 bytes. Same bug whether the
client is a single recv loop, multiple threads, TCP or UNIX socket,
or whether QEMU runs as server vs client. virtconsole on the same
socket works fine — only virtserialport is broken.

Workaround: use `pipe` chardev (a pair of named FIFOs created
beforehand by qemu_manager). guest→host through .out flows reliably
in QEMU 10 — verified with manual test: 'echo PIPE_TEST > /dev/vport1p1'
in the guest produces 'PIPE_TEST\n' immediately on the host side.

Changes:
- qemu_manager._boot: allocate a temp basename, mkfifo .in + .out,
  pass to QEMU as 'pipe,path=<base>'.
- qemu_manager._connect_gpio: open both FIFOs O_RDWR | O_NONBLOCK on
  host side (O_RDWR keeps the FIFOs open even when guest hasn't
  opened its side yet), wire .out into asyncio via loop.add_reader.
- qemu_manager._reply_gpio / _send_gpio: write to .in fd via os.write.
- qemu_manager._handle_gpio_line: extended Phase 1 GPIO-only parser
  into a full Phase 2 mux: GPIO/GPIO_SETUP/GPIO_IN/PWM_*/I2C/SPI/UART
  with appropriate replies.
- qemu_manager._shutdown: close FDs + unlink the FIFOs.
- manifest.json: bump raspberry-pi-3-virt rootfs to 2026.05+phase2-shims
  (the new rootfs ships the velxio shim Python modules under
  /usr/lib/velxio-shims/).
2026-05-18 06:51:23 +02:00
..
boot_images fix(pi3): pipe chardev for proto channel + Phase 2 protocol mux 2026-05-18 06:51:23 +02:00
esp-idf-template fix(espidf): enable mbedTLS PSK so ssl_client.cpp links 2026-05-14 12:38:20 -03:00
picow_net Implement TCP and UDP NAT services for chip-initiated connections 2026-04-29 08:43:41 -03:00
__init__.py feat: Implement Arduino Simulator with component management and simulation features 2026-03-03 00:20:49 -03:00
arduino_cli.py feat: Add library version management and uninstall functionality 2026-05-02 12:54:09 +05:30
chip_compile.py Add ESP32 chip demos and comprehensive tests for I2C, SPI, and UART interactions 2026-04-28 19:24:39 -03:00
esp32_flash_image.py fix(esp32): trim flash image before serializing, pad on QEMU attach 2026-05-08 14:36:34 -03:00
esp32_i2c_slaves.py feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
esp32_lib_bridge.py fix(esp32): trim flash image before serializing, pad on QEMU attach 2026-05-08 14:36:34 -03:00
esp32_lib_manager.py Add end-to-end tests for ESP32 I2C functionality and circuit verification 2026-05-12 16:55:15 -03:00
esp32_signals.py fix(esp32): LEDC signal IDs are 71-86 per ESP32 TRM, not 72-87 2026-05-17 05:42:52 +02:00
esp32_spi_slaves.py feat: add support for UC8159c (ACeP 7-colour) display 2026-04-30 00:27:40 -03:00
esp32_worker.py fix(esp32 worker): importlib fallback for SignalRouter modules 2026-05-17 05:26:12 +02:00
esp_qemu_manager.py feat: implement ESP32 QEMU backend manager and frontend simulation interface 2026-04-01 22:41:52 -03:00
espidf_compiler.py feat(compile): stream live ESP-IDF cmake + ninja output to the console 2026-05-09 23:36:58 +02:00
gpio_shim.py feat: add board types and mappings for Raspberry Pi 3B 2026-03-12 23:39:04 -03:00
picow_net_bridge.py Implement TCP and UDP NAT services for chip-initiated connections 2026-04-29 08:43:41 -03:00
qemu_manager.py fix(pi3): pipe chardev for proto channel + Phase 2 protocol mux 2026-05-18 06:51:23 +02:00
signal_router.py feat(esp32): SignalRouter — model the GPIO Matrix as first-class 2026-05-17 05:00:53 +02:00
wasm_chip_runtime.py Add ESP32 chip demos and comprehensive tests for I2C, SPI, and UART interactions 2026-04-28 19:24:39 -03:00
wasm_chip_slave.py Add ESP32 chip demos and comprehensive tests for I2C, SPI, and UART interactions 2026-04-28 19:24:39 -03:00
wifi_status_parser.py feat: implement ESP32 QEMU backend manager and frontend simulation interface 2026-04-01 22:41:52 -03:00