velxio/frontend/src/simulation/spice
David Montero Crespo 6307aed007 feat: breadboard (full 830-point) + mini breadboard (170-point) parts
Two velxio-native passive parts, rendered as web components with
programmatic SVG + precomputed pinInfo (velxio-breadboard 830 holes,
velxio-breadboard-mini 170). Pin names follow the Wokwi convention
(holes `18t.d` / `17b.i`, rails `tp/tn/bp/bn.N`) and the metadata ids
are `breadboard` / `breadboard-mini`, so wokwi diagram.json zips
import/export with no aliasing.

Internal connectivity (5-hole column strips, full-length power rails)
is centralized in utils/breadboardNets.ts and wired into every net
consumer:
- NetlistBuilder: unionBreadboardGroups joins wired holes per group at
  the union-find level in buildNetlist, buildWireNetMap and
  buildBoardPinNetMap — SPICE, the circuit verifier and the voltage
  overlay all see one net per strip/rail with no extra cards.
- DynamicComponent.traceDetailed: the digital trace hops through every
  other wired hole of the entered group, so parts wired through a
  breadboard still resolve their board pin (2-terminal
  PASSIVE_PIN_PAIRS could not express N-hole groups).

Verified end-to-end in the app: Uno pin 8 -> full-board column ->
resistor -> mini-board column -> LED -> ground rail -> GND lights the
LED, and the HUD shows the 3 collapsed SPICE nets. 8 new unit tests
(breadboard-nets.test.ts); netlist-builder + circuit-verifier suites
stay green.
2026-07-15 21:50:36 +02:00
..
adapters
models
ports
wasm
CircuitSimulationService.ts feat(avr): drive inputs from real circuit, modeling the internal pull-up 2026-06-26 20:18:41 +02:00
MixedModeScheduler.ts
NetlistBuilder.ts feat: breadboard (full 830-point) + mini breadboard (170-point) parts 2026-07-15 21:50:36 +02:00
boardPinGroups.ts fix(sim): model slide-switch as a real SPDT + tie ESP32 dual 3V3/5V pins to the rail 2026-07-09 18:58:12 +02:00
collectPinStates.ts sim: drive RP2040 + STM32 digital inputs from the real circuit 2026-06-26 22:05:24 +02:00
componentToSpice.ts fix(sim): model slide-switch as a real SPDT + tie ESP32 dual 3V3/5V pins to the rail 2026-07-09 18:58:12 +02:00
connectAnalogInputsToMcu.ts feat(attiny85+customchip): full ATtiny85 ADC/Timer0 + custom-chip pipeline fixes 2026-05-19 18:10:08 -03:00
connectChipInputsToSolve.ts feat(sim): custom chips read inputs (buttons/switches/sensors) with no board 2026-06-04 05:09:51 +02:00
connectDigitalInputsToMcu.ts feat(avr): drive inputs from real circuit, modeling the internal pull-up 2026-06-26 20:18:41 +02:00
connectMcuEdgesToService.ts fix(sim): wire ATtiny85 PBx pin edges into the SPICE mixed-mode loop 2026-06-19 05:15:26 +02:00
electricalResolveHook.ts feat(custom-chip): make chip pins first-class circuit nodes (digital + SPICE) 2026-06-03 05:40:49 +02:00
probes.ts
runNetlist.ts fix(sim): circuit verifier was silently blind to current faults in prod 2026-06-17 20:37:32 +02:00
start.ts feat(avr): drive inputs from real circuit, modeling the internal pull-up 2026-06-26 20:18:41 +02:00
storeAdapter.ts feat(sim): P1 over-voltage for boards + electrolytic capacitors 2026-06-18 01:19:13 +02:00
types.ts feat(esp32): emulate internal pull-up/pull-down for GPIO inputs 2026-06-24 03:32:30 +02:00
unionFind.ts
valueParser.ts
waveformStats.ts