velxio/scripts
David Montero Crespo 223ea24481 fix(ssd1306): picker thumbnail matches the redrawn part
The 4-pin module's picker icon still drew the screen as a flat dark
rect, so the catalogue entry looked like a different part from the one
you get on the canvas. Same glass treatment as the element: bonded
panel with its bevel, inset active area, flex tail and sheen.

The generated components-metadata.json is synced by hand because the
generator skips without a third-party/wokwi-elements clone; the value
is copied verbatim from component-overrides.json, which stays the
source of truth, so a later regeneration reproduces it exactly.
2026-08-20 16:04:54 +02:00
..
asm8080.py feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
component-overrides.json fix(ssd1306): picker thumbnail matches the redrawn part 2026-08-20 16:04:54 +02:00
counter-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
counter-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
generate-component-metadata.ts feat(components): make KY-040 rotary encoder discoverable + add example (#104) 2026-05-31 14:30:59 -03:00
generate-component-svgs.cjs fix(scripts): generate-component-svgs no longer skips bmp280 / fails on ssd1306 2026-05-09 00:05:28 -03:00
generate-example-screenshots.md Merge doc/ into docs/ — eliminate duplicate documentation folders 2026-03-11 17:03:51 +00:00
generate-favicons.mjs
…
generate-og-image.mjs feat: add admin management features and user role handling 2026-03-06 23:46:36 -03:00
generate-sitemap.ts feat: implement sitemap generation and search engine pinging in build process 2026-03-23 18:52:35 -03:00
killbits-rom.s feat(chips): programmable retro CPU chips with external ROM 2026-05-18 23:38:18 -03:00
larson-z80.s feat(chips): programmable Z80 chip + Larson scanner example 2026-05-19 00:21:08 -03:00
make-z80-cpu.py fix(z80-cpu): map RAM over the whole 0x8000-0xFFFF so vanilla SDCC C runs 2026-06-03 13:31:26 +02:00
repl-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
repl-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
test-z80.s feat(chips): programmable Z80 chip + Larson scanner example 2026-05-19 00:21:08 -03:00
visual-led-test.mjs test(visual-led): add RGB + 7-segment leafCheck assertions 2026-05-18 22:39:01 -03:00