81 lines
5.2 KiB
TypeScript
81 lines
5.2 KiB
TypeScript
/**
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* Phase 3 — Galaksija RAM+display chip renders from real video RAM
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* (project/multichip-bus/).
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*
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* galaksija-ram-display is the 64 KB RAM with the screen folded in: it renders
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* the 32x16 text screen from its OWN video RAM (0x2800-0x2BFF) on a ~30 fps
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* timer, instead of snooping bus writes. That makes the picture correct
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* regardless of when its paint timer first fires — the failure mode of the old
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* passive-snoop display (which lost the boot screen if it came up late). Here
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* the CPU boots and writes the whole screen FIRST, and the display's very first
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* paint happens only AFTER all writes are done; it must still show the ">"
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* prompt because it reads the memory it owns.
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*/
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import { describe, it, expect, beforeEach, afterEach } from 'vitest';
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import { readFileSync, existsSync } from 'node:fs';
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import { fileURLToPath } from 'node:url';
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import { PinManager } from '../simulation/PinManager';
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import { ChipInstance } from '../simulation/customChips/ChipRuntime';
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import {
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resolveChipNetKey, setChipBusEnabledForTest, resetChipNetIndexForTest, type ChipNetState,
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} from '../simulation/customChips/chipNets';
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import { syntheticChipPin } from '../simulation/customChips/syntheticPins';
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import { resetBusNets } from '../simulation/customChips/busNets';
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const f = (n: string) => fileURLToPath(new URL(`./fixtures/chipbus/${n}`, import.meta.url));
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const P = { z80: f('z80.wasm'), rom: f('galaksija-rom.wasm'), ramdisp: f('galaksija-ram-display.wasm'), inv: f('inverter.wasm') };
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const have = Object.values(P).every(existsSync);
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const range = (n: number) => Array.from({ length: n }, (_, i) => i);
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const Z80 = [...range(16).map((i) => `A${i}`), ...range(8).map((i) => `D${i}`), 'M1', 'MREQ', 'IORQ', 'RD', 'WR', 'RFSH', 'HALT', 'WAIT', 'INT', 'NMI', 'RESET', 'BUSREQ', 'BUSACK', 'CLK', 'VCC', 'GND'];
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const ROM = [...range(13).map((i) => `A${i}`), ...range(8).map((i) => `D${i}`), 'CE', 'OE'];
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const RD = [...range(16).map((i) => `A${i}`), ...range(8).map((i) => `D${i}`), 'CE', 'OE', 'WE', 'VCC', 'GND'];
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const INV = ['IN', 'OUT'];
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const W: ChipNetState['wires'] = [];
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const wire = (a: string, ap: string, b: string, bp: string) => (W as { start: { componentId: string; pinName: string }; end: { componentId: string; pinName: string } }[]).push({ start: { componentId: a, pinName: ap }, end: { componentId: b, pinName: bp } });
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// A0-A12 to the RAM (A13 selects it via CE), exactly like the gallery example.
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for (const i of range(13)) wire('z80', `A${i}`, 'rd', `A${i}`);
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for (const i of range(13)) wire('z80', `A${i}`, 'rom', `A${i}`);
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wire('z80', 'A13', 'rom', 'CE'); wire('z80', 'A13', 'inv', 'IN'); wire('inv', 'OUT', 'rd', 'CE');
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for (const i of range(8)) { wire('z80', `D${i}`, 'rom', `D${i}`); wire('z80', `D${i}`, 'rd', `D${i}`); }
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wire('z80', 'RD', 'rom', 'OE'); wire('z80', 'RD', 'rd', 'OE'); wire('z80', 'WR', 'rd', 'WE');
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const STATE: ChipNetState = { wires: W, components: ['z80', 'rom', 'rd', 'inv'].map((id) => ({ id, metadataId: 'custom-chip' })), boards: [] };
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const pk = (c: string, p: string): number => resolveChipNetKey(STATE, c, p) ?? syntheticChipPin(c, p);
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const wf = (c: string, pins: string[]) => new Map(pins.map((p) => [p, pk(c, p)] as [string, number]));
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const cellLit = (fb: Uint8Array, col: number, row: number): number => { let n = 0; for (let y = 0; y < 8; y++) for (let x = 0; x < 8; x++) if (fb[((row * 8 + y) * 256 + (col * 8 + x)) * 4 + 1] > 0x80) n++; return n; };
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describe.skipIf(!have)('chipbus Phase 3 — Galaksija RAM+display renders from video RAM', () => {
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beforeEach(() => { setChipBusEnabledForTest(true); resetChipNetIndexForTest(); resetBusNets(); });
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afterEach(() => { setChipBusEnabledForTest(null); resetChipNetIndexForTest(); resetBusNets(); });
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const mk = async (pm: PinManager, k: keyof typeof P, id: string, pins: string[], display?: { width: number; height: number }) =>
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ChipInstance.create({ wasm: new Uint8Array(readFileSync(P[k])), componentId: id, pinManager: pm, wires: wf(id, pins), display });
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it('shows the ">" prompt even when the first paint happens after the boot writes', async () => {
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const pm = new PinManager();
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const z80 = await mk(pm, 'z80', 'z80', Z80); z80.start();
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(await mk(pm, 'rom', 'rom', ROM)).start();
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const rd = await mk(pm, 'ramdisp', 'rd', RD, { width: 256, height: 128 });
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let fb: Uint8Array | null = null; rd.onFramebufferUpdate((r) => { fb = r as Uint8Array; }); rd.start();
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(await mk(pm, 'inv', 'inv', INV)).start();
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for (const p of ['WAIT', 'INT', 'NMI', 'BUSREQ']) pm.triggerPinChange(pk('z80', p), true);
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pm.triggerPinChange(pk('z80', 'RESET'), false); pm.triggerPinChange(pk('z80', 'RESET'), true);
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// Boot fully FIRST — the CPU writes the whole screen into RAM. (chip_setup
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// pushed one initial blank framebuffer; the paint timer has not run yet.)
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z80.tickTimers(BigInt(240000 * 250));
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// The first real paint happens only now, long after every screen write.
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// Reading real video RAM, it still renders the prompt.
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fb = null;
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rd.tickTimers(50_000_000n);
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expect(fb, 'the paint timer pushed a framebuffer').not.toBeNull();
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expect(cellLit(fb!, 0, 1), 'the BASIC ">" prompt rendered from video RAM').toBeGreaterThan(4);
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z80.dispose(); rd.dispose();
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}, 60_000);
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});
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