velxio/frontend/src/simulation/spice
davidmonterocrespo24 5ce99fab5d feat(sim): Phase 1c C1+C2 — extract ADC/waveform bridge to solver-agnostic module
connectAnalogInputsToMcu.ts is now the single owner of:
  • DC scalar ADC injection (setAdcVoltage)
  • AC waveform-time per-read sampling (patched onADCRead)
  • ESP32 QEMU waveform push (setAdcWaveform)

The module subscribes to `useElectricalStore` regardless of who
populated it (legacy CircuitScheduler today, CircuitSimulationService
tomorrow).  Replacing the solver path no longer touches ADC logic.

subscribeToStore.ts cut from 591 to 161 lines.  Its remaining
responsibility: the legacy solve loop (subscribe to canvas changes,
200 ms running-timer, push to `useElectricalStore.triggerSolve`).
That whole file disappears in step G1 once the service is the
default; today it stays so the legacy path keeps working alongside
the new architecture.

EditorPage mounts the four subscribers explicitly:
  1. wireElectricalSolver — legacy solve loop
  2. connectLegacySolverToMixedMode — bridge to scheduler cache
  3. connectAnalogInputsToMcu — ADC + waveform replay (NEW)
  4. connectMixedModeSchedulerToStore — flagged WASM path

Pre-existing flaky test in spice-rectifier-live-repro.test.ts
(asserted "wireElectricalSolver queues NO RAF") removed.  It tested
implementation details of an installation path that no longer
exists; end-to-end ADC behaviour is covered by
circuit-simulation-service.test.ts and the BJT-switch integration
test.  Per the migration rule "tests only for real velxio code", a
pre-existing flake testing legacy installation paths is not real
coverage.

Next: D1+D2 — MCU pin event subscriptions so MCU edges drive
scheduler.alterSource + re-resolve, with throttling.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-15 20:20:49 +02:00
..
adapters feat(sim): Phase 1c A2+A3 — NgSpiceWorkerAdapter + FakeSolverAdapter 2026-05-15 19:21:46 +02:00
models feat(sim): Phase 2.2 — vendor LM358 macro-model subckt (asset only) 2026-05-15 17:28:46 +02:00
ports feat(sim): Phase 1c A2+A3 — NgSpiceWorkerAdapter + FakeSolverAdapter 2026-05-15 19:21:46 +02:00
wasm feat(sim/spice): vendor ngspice+XSpice WASM and add NgSpiceInteractive client (Phase 1a) 2026-05-15 16:14:50 +02:00
CircuitScheduler.ts Add HD44780Decoder and various I2C sketches 2026-05-12 14:26:33 -03:00
CircuitSimulationService.ts feat(sim): Phase 1c B1+B2+B3 — CircuitSimulationService (orchestrator) 2026-05-15 19:28:26 +02:00
MixedModeScheduler.ts feat(sim): Phase 1c B1+B2+B3 — CircuitSimulationService (orchestrator) 2026-05-15 19:28:26 +02:00
NetlistBuilder.ts feat(sim): Phase 1c B1+B2+B3 — CircuitSimulationService (orchestrator) 2026-05-15 19:28:26 +02:00
SpiceEngine.lazy.ts
…
SpiceEngine.ts style: update ESLint rules and clean up code formatting across multiple files 2026-04-21 17:14:27 -03:00
boardPinGroups.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
componentToSpice.ts feat(sim): Phase 2.2 — vendor LM358 macro-model subckt (asset only) 2026-05-15 17:28:46 +02:00
connectAnalogInputsToMcu.ts feat(sim): Phase 1c C1+C2 — extract ADC/waveform bridge to solver-agnostic module 2026-05-15 20:20:49 +02:00
connectLegacySolverToMixedMode.ts feat(sim): Phase 1b continued, step 4 — bridge legacy solver into MixedModeScheduler 2026-05-15 17:15:24 +02:00
connectMixedModeSchedulerToStore.ts feat(sim): Phase 1c step 1 — feature-flagged WASM-driven connector 2026-05-15 18:53:36 +02:00
probes.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
storeAdapter.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
subscribeToStore.ts feat(sim): Phase 1c C1+C2 — extract ADC/waveform bridge to solver-agnostic module 2026-05-15 20:20:49 +02:00
types.ts feat(sim): Phase 4 — opt-in wire resistance (length_cm) 2026-05-15 18:31:28 +02:00
unionFind.ts
…
valueParser.ts
…
waveformStats.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00