velxio/frontend/src/simulation
davidmonterocrespo24 54936ef660 feat(sim): Phase 1d #2 + #9 — convergence helpers in Worker + enable LM358 subckt
#2: NgSpiceWorkerAdapter.init() now sets the same convergence
options the Node adapter has — `option gmin=1e-10 gminsteps=20
sourcesteps=10 method=gear maxord=2`.  Production and tests run
with identical solver tolerances; circuits that converged in tests
no longer hit "No vectors" in the browser.  Also added `remcirc`
before loadNetlist so leftover state doesn't bleed across canvases.

#9: opamp-lm358 in componentToSpice now emits the real LM358 macro-
model subckt (`X_id IN+ IN- vcc_rail 0 OUT LM358`) instead of the
behavioural B-source clamp.  The subckt was vendored as an asset in
Phase 2.2 and has been waiting for #2 to land — now active.

Smoke-test side effect: 67/68 → 68/68 examples converge.  The opamp
follower (`an-opamp-follower`) was the last one that didn't.

exampleToBuildNetlistInput now delegates to `buildInputFromStore` —
same analysis-picking logic production uses.  A signal-generator
circuit gets `.tran`, an MCU-driven RC step gets `.tran` with the
right τ window, plain DC gets `.op`.  No more inline analysis guess.

examples-analog.test.ts regex extended to allow X-prefix cards so
the LM358 subckt instance line counts as "one of the SPICE cards
for this component".

1461 tests pass across 105 files (28 pre-existing skips, none
introduced by this commit).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-15 22:17:06 +02:00
..
customChips
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cyw43 refactor: rename wokwi-libs/ → third-party/ 2026-05-03 00:58:57 -03:00
displays feat: add support for UC8159c (ACeP 7-colour) display 2026-04-30 00:27:40 -03:00
parts feat(sim): Phase 5 — migrate RGB LED + buzzer handlers to PinResolver 2026-05-15 18:25:40 +02:00
spice feat(sim): Phase 1d #2 + #9 — convergence helpers in Worker + enable LM358 subckt 2026-05-15 22:17:06 +02:00
verify feat(sim): Phase 1c F2 — migrate 22 SPICE test files to NgSpiceNodeAdapter 2026-05-15 21:23:53 +02:00
AVRSimulator.ts feat(sim): Phase 1c G+F3 — retire legacy CircuitScheduler / eecircuit-engine 2026-05-15 21:46:34 +02:00
Esp32Bridge.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
Esp32C3Simulator.ts
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Esp32MicroPythonLoader.ts Add comprehensive tests for Cyw43Emulator functionality and lifecycle 2026-04-29 00:21:26 -03:00
HD44780Decoder.ts Add HD44780Decoder and various I2C sketches 2026-05-12 14:26:33 -03:00
I2CBusManager.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
Interconnect.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
LogicFamilies.ts feat(sim): Phase 3 — logic families (TTL/CMOS-5V/LVCMOS33/AVR_HC/Schmitt) 2026-05-15 16:42:11 +02:00
MicroPythonLoader.ts
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PinManager.ts
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PinResolver.ts feat(sim): Phase 3 — logic families (TTL/CMOS-5V/LVCMOS33/AVR_HC/Schmitt) 2026-05-15 16:42:11 +02:00
RP2040Simulator.ts fix(rp2040): route SPI0 through the adapter in initMCU too 2026-05-15 00:23:36 -03:00
RaspberryPi3Bridge.ts
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RiscVCore.ts
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RiscVSimulator.ts
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SensorUpdateRegistry.ts
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SpiBus.ts refactor(spi): unify SPI bus interface across all simulators 2026-05-02 22:36:29 -03:00
rp2040-bootrom.ts
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sensorControlConfig.ts
…