velxio/frontend/src/simulation
davidmonterocrespo24 27c59664cd feat(sim): Phase 1b skeleton — SPICE-resolved PinResolver + active-path detection
Adds the architecture pieces for mixed-mode coupling without yet
driving the SPICE engine.  Components on a path that crosses an active
device (BJT, MOSFET, op-amp, diode, regulator, LED, relay) now route
through a new SPICE-resolved PinResolver variant; everything else
keeps the digital fast-path from Phase 0.

What ships:

  - simulation/PinResolver.ts
    * `isActiveDevice(metadataId)` predicate + `ACTIVE_DEVICE_PREFIXES`
      list (BJTs, MOSFETs, op-amps, diodes, regulators, LED, relay).
    * `DetailedPinTrace` / `DetailedPinTracer` types — the trace
      function now reports whether it crossed an active device, on
      top of the Arduino pin number.
    * `createSpiceResolvedPinResolver()` — new factory; reads voltages
      from a `SpiceVoltageSource` and threshold-converts to HIGH/LOW
      with hysteresis (thresholdHigh != thresholdLow → Schmitt-like).

  - simulation/spice/MixedModeScheduler.ts (new)
    * Singleton orchestrator that holds the NgSpiceInteractive engine
      and the SpiceVoltageSource subscription registry.
    * `start()` / `stop()` / `dispose()` lifecycle.
    * `subscribe()` + `getCurrentVoltage()` implement SpiceVoltageSource.
    * `onMcuPinChange()` placeholder for the alter+tran event loop.
    * Skeleton: subscribers register but never receive events yet.
      Phase 1b continued will wire NgSpiceInteractive into the loop.

  - components/DynamicComponent.tsx
    * Trace function extended with `traceDetailed()` that tracks
      whether the BFS crossed an active component.
    * PinResolver factory branches: active-path → SPICE-resolved (uses
      the scheduler), digital-only → existing default impl.  Default
      threshold = vcc/2 with no hysteresis; Phase 3 will replace with
      per-logic-family Vil/Vih.

Phase 0 LED behavior intact (digital path).  Phase 1b SPICE-resolved
path falls back to FLOATING until Phase 1b continued wires the engine.

Tests:
  - pin-resolver-phase1b.test.ts (new) — 8/8 passing.
    Covers isActiveDevice for every BJT/MOSFET/op-amp/diode/regulator
    metadata id; SPICE-resolved resolver state reporting, threshold
    conversion, hysteresis dead-band, unsubscribe.
  - pin-resolver.test.ts (Phase 0) — 8/8 still passing (no regression).
  - tsc --noEmit on the new files: clean.

No deploy in this commit — staged for end-of-session rebuild + push
per user preference.
2026-05-15 16:38:30 +02:00
..
customChips Add ESP32 chip demos and comprehensive tests for I2C, SPI, and UART interactions 2026-04-28 19:24:39 -03:00
cyw43 refactor: rename wokwi-libs/ → third-party/ 2026-05-03 00:58:57 -03:00
displays feat: add support for UC8159c (ACeP 7-colour) display 2026-04-30 00:27:40 -03:00
parts feat(sim): introduce PinResolver abstraction (Phase 0 of mixed-mode rewrite) 2026-05-15 15:50:09 +02:00
spice feat(sim): Phase 1b skeleton — SPICE-resolved PinResolver + active-path detection 2026-05-15 16:38:30 +02:00
verify Add end-to-end tests for ESP32 I2C functionality and circuit verification 2026-05-12 16:55:15 -03:00
AVRSimulator.ts Add HD44780Decoder and various I2C sketches 2026-05-12 14:26:33 -03:00
Esp32Bridge.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
Esp32C3Simulator.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
Esp32MicroPythonLoader.ts Add comprehensive tests for Cyw43Emulator functionality and lifecycle 2026-04-29 00:21:26 -03:00
HD44780Decoder.ts Add HD44780Decoder and various I2C sketches 2026-05-12 14:26:33 -03:00
I2CBusManager.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
Interconnect.ts feat(i2c): cross-board bridging across all velxio boards (AVR/RP2040/ESP32 xtensa+riscv) 2026-05-12 17:51:39 -03:00
MicroPythonLoader.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
PinManager.ts feat(multi-board): add wire-aware cross-board interconnect router 2026-04-25 19:47:40 -03:00
PinResolver.ts feat(sim): Phase 1b skeleton — SPICE-resolved PinResolver + active-path detection 2026-05-15 16:38:30 +02:00
RP2040Simulator.ts fix(rp2040): route SPI0 through the adapter in initMCU too 2026-05-15 00:23:36 -03:00
RaspberryPi3Bridge.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
RiscVCore.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
RiscVSimulator.ts refactor: rename components and update prefixes to 'velxio-' for consistency 2026-04-21 16:45:45 -03:00
SensorUpdateRegistry.ts feat: add SensorControlPanel for interactive sensor controls 2026-03-19 01:52:46 -03:00
SpiBus.ts refactor(spi): unify SPI bus interface across all simulators 2026-05-02 22:36:29 -03:00
rp2040-bootrom.ts
sensorControlConfig.ts feat(photodiode): add lux control in sensor panel and property dialog 2026-04-24 16:42:36 +02:00