velxio/scripts/test-z80.s

; Quick smoke test for the Z80 assembler.
        ORG 0x0000

        LD   SP, 0xBFFF
        LD   A, 0x55
        LD   (0xC000), A      ; write to LED port
loop:
        LD   B, 0
delay:
        DJNZ delay
        LD   A, (0xC003)       ; read buttons
        XOR  0xFF
        LD   (0xC000), A
        JR   loop
feat(chips): programmable Z80 chip + Larson scanner example Adds the Zilog Z80 to the programmable-retro-CPU lineup. Same compile-rom flow that landed for the 8080 in PR #189: write Z80 asm in a project file, click Compile (backend assembles via in-tree two-pass asm-z80), click Run, the chip emulator boots from the resulting ROM bytes. Backend: - backend/app/services/asmz80.py — two-pass Z80 assembler covering the practical demo subset: LD r,n / r,r' / rp,nn / (nn),A / A,(nn) + ALU r/n + INC/DEC + JP/JR/DJNZ/CALL/RET + PUSH/POP + IN/OUT + EX/EXX + LDIR/LDDR/IM/NEG + RLCA/RRCA/RLA/RRA + the simple ED-prefix variants. Not yet: CB-prefix bit ops, DD/FD index ops. - rom_compile.py routes target=z80 through the new assembler. Chip: - frontend/src/components/customChips/examples/intel/z80-cpu.{c,chip.json} Generated by scripts/make-z80-cpu.py from the existing z80.c emulator (same clean-room implementation that passes ZEXDOC end-to-end). The external pin/bus protocol is replaced with internal RAM + ROM + MMIO for LED/BTN/UART. 35 KB WASM. Example: - /examples/z80-larson-scanner — Knight-Rider-style walking LED. Demonstrates JR/DJNZ/RLCA which the 8080 can't run. Plus a small Z80 smoke-test asm under scripts/. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> 2026-05-19 10:21:08 +07:00			`; Quick smoke test for the Z80 assembler.`
			`ORG 0x0000`

			`LD SP, 0xBFFF`
			`LD A, 0x55`
			`LD (0xC000), A ; write to LED port`
			`loop:`
			`LD B, 0`
			`delay:`
			`DJNZ delay`
			`LD A, (0xC003) ; read buttons`
			`XOR 0xFF`
			`LD (0xC000), A`
			`JR loop`